-
1 chip patterning
Микроэлектроника: формирование рельефа на кристалле ИС, формирование рисунка на кристалле ИС -
2 chip patterning
формування рельєфу на кристалі ІС; формування малюнка на кристалі ІСEnglish-Ukrainian dictionary of microelectronics > chip patterning
-
3 patterning
1) формування малюнка; формування зображення; формування рельєфу 2) структуризація - chip patterning
- dry patterning
- electron-beam patterning
- fine-line patterning
- lift-off patterning
- metal patterning
- microlithographic patterning
- nanometer patterning
- optical patterning
- resist patterning
- resistless patterning
- subfflicron patterning
- X-ray patterningEnglish-Ukrainian dictionary of microelectronics > patterning
-
4 формирование рельефа на кристалле ИС
Microelectronics: chip patterningУниверсальный русско-английский словарь > формирование рельефа на кристалле ИС
-
5 формирование рисунка на кристалле ИС
Microelectronics: chip patterningУниверсальный русско-английский словарь > формирование рисунка на кристалле ИС
-
6 process
1. ім.1) процес; (технологічний) метод, спосіб2) технологія (див. т-ж technique, technology)3) (технологічна) обробка; технологічна операція2. дієсл. обробляти; проводити технологічну операцію - all-ion-implant process
- all-planar process
- Auger process
- batch process
- BH bias and hardness process
- BH process
- bonding process
- BOX process
- bulk CMOS process
- bumping process
- chip-on-board process
- closed CMOS process
- CMOS-on-sapphire process
- composite сеll logic process
- contact process
- conventional process
- deep охide isolation process
- DIFET process
- diffused eutectic aluminum process
- direct synthesis and crystal pull process
- double-diffused process
- double ion-implanted process
- double-layer polysilicon gate MOS process
- double-layer polysilicon gate process
- epitaxial deposition process
- epitaxial process
- epitaxial growth process
- flip-over process
- floating-gate silicon process
- front-end process
- gold-doped process
- guard-banded CMOS process
- heterogeneous process
- high-voltage process
- HMOS process
- imaging process
- implantation process
- in-house process
- interconnection process
- inverted meniscus process
- ion plating process
- isoplanar -S, -Z, -2 process
- isoplanar process
- junction-isolated process
- laser-recrystallized process
- lithographic process
- low-pressure process
- low VT process
- lost wafer process
- major process
- masking process
- master slice process
- mesa-isolation process
- metal-gate MOS process
- metal-gate process
- microbipolar LSI process
- micrometer-dimension process
- mid-film process
- Minimod process
- Mo-gate MOS process
- Mo-gate process
- nitride process
- nitrideless process
- NSA process
- oxide-film isolation process
- oxide isolated process
- oxygen refilling process
- patterning process
- phosphorous buried-emitter process
- photoablative process
- photolithography process
- photoresist process
- planar oxidation process
- Planox process
- plasma etch process
- Poly I process
- Poly II process
- Poly 5 process
- poly-oxide process
- Poly-Si process
- polysilicon-gate process
- poly-squared MOS process
- proprietary process
- PSA bipolar process
- PSA process
- refractory metal MOS process
- refractory metal process
- sacrificial охide process
- sapphire dielectric isolation process
- scaled Poly 5 process
- screen-and-fire process
- selective field-охidation process
- self-aligned gate process
- self-aligned process
- self-registered gate process
- self-registered process
- semi-additive process
- semiconductor-thermoplastic-dielectric process
- semicustom process
- shadow masking process
- silk-screen process
- single poly process
- SMOS process
- SOS/CMOS process
- stacked fuse bipolar process
- Stalicide process
- step-and-repeat process
- subtractive-fabrication process
- surface process
- Telemos process
- thermal process
- thermally асtivated surface process
- thermal-охidation process
- three-mask process
- triple-diffused process
- triply-poly process
- twin-tub process
- twin-well process
- V-groove MOS process
- V-groove process
- wet process
- 3-D process
См. также в других словарях:
gate-array master chip patterning — pamatinio matricinio lusto paveikslo sukūrimas statusas T sritis radioelektronika atitikmenys: angl. chip array patterning; gate array master chip patterning vok. Grundchip Array Strukturierung, f rus. формирование рисунка на базовом матричном… … Radioelektronikos terminų žodynas
chip array patterning — pamatinio matricinio lusto paveikslo sukūrimas statusas T sritis radioelektronika atitikmenys: angl. chip array patterning; gate array master chip patterning vok. Grundchip Array Strukturierung, f rus. формирование рисунка на базовом матричном… … Radioelektronikos terminų žodynas
Multiple patterning — is a class of technologies developed for photolithography to enhance the feature density. The simplest case of multiple patterning is double patterning, where a conventional lithography process is enhanced to produce double the expected number of … Wikipedia
Double patterning — is a class of technologies developed for photolithography to enhance the feature density. For the semiconductor industry, double patterning is the only lithography technique to be used for the 32 nm and 22 nm half pitch nodes in 2008 2009 and… … Wikipedia
Grundchip-Array-Strukturierung — pamatinio matricinio lusto paveikslo sukūrimas statusas T sritis radioelektronika atitikmenys: angl. chip array patterning; gate array master chip patterning vok. Grundchip Array Strukturierung, f rus. формирование рисунка на базовом матричном… … Radioelektronikos terminų žodynas
définition de dessin sur réseau — pamatinio matricinio lusto paveikslo sukūrimas statusas T sritis radioelektronika atitikmenys: angl. chip array patterning; gate array master chip patterning vok. Grundchip Array Strukturierung, f rus. формирование рисунка на базовом матричном… … Radioelektronikos terminų žodynas
pamatinio matricinio lusto paveikslo sukūrimas — statusas T sritis radioelektronika atitikmenys: angl. chip array patterning; gate array master chip patterning vok. Grundchip Array Strukturierung, f rus. формирование рисунка на базовом матричном кристалле ИС, n pranc. définition de dessin sur… … Radioelektronikos terminų žodynas
формирование рисунка на базовом матричном кристалле ИС — pamatinio matricinio lusto paveikslo sukūrimas statusas T sritis radioelektronika atitikmenys: angl. chip array patterning; gate array master chip patterning vok. Grundchip Array Strukturierung, f rus. формирование рисунка на базовом матричном… … Radioelektronikos terminų žodynas
Nanoimprint lithography — is a method of fabricating nanometer scale patterns. It is a simple nanolithography process with low cost, high throughput and high resolution. It creates patterns by mechanical deformation of imprint resist and subsequent processes. The imprint… … Wikipedia
Microelectromechanical systems — (MEMS) (also written as micro electro mechanical, MicroElectroMechanical or microelectronic and microelectromechanical systems) is the technology of very small mechanical devices driven by electricity; it merges at the nano scale into… … Wikipedia
Semiconductor device fabrication — Semiconductor manufacturing processes 10 µm 1971 3 µm 1975 1.5 µm 1982 … Wikipedia
